Documentation

Control

Control is the layer that shapes, regulates, and stabilizes all signals involved in the power‑conversion or motor‑control process.
It ensures that references are followed, limits are respected, and the final modulation delivered to the hardware is consistent, safe, and dynamically well‑behaved regardless of how many or which specific control blocks are present.

Dd/Dq Saturation

Saturates the d‑ and q‑axis inputs based on the reference magnitude Vs.
Prevents the voltage vector from exceeding the admissible limit imposed by Vs (anti‑windup friendly when used before the modulator).

Duty Saturation

Clamps the three modulating signals within [0, Fsw] (or equivalently within one switching period).
Ensures the duty cycles remain physically valid before being passed to the modulator that generates gate pulses.

Duty Shift

Shifts bipolar modulators (initially int16, spanning negative and positive) to a unipolar range.
Outputs modulators expressed in ticks from 0 to Fsw, suitable for direct PWM mapping.

Multiply Fswitching

Scales the three inputs Da, Db, Dc so that the outputs span −Fsw … +Fsw.
Useful when converting normalized modulators into absolute tick units referenced to the switching frequency.

PI (Proportional–Integral)

Standard PI controller with proportional and integral actions.
Used for current/voltage/speed loops; supports saturation pairing for anti‑windup when combined with limiter blocks.

SawToothGenerator

Generates a classic sawtooth (or carrier) waveform for PWM comparison.
Phase‑continuous and periodic, used as the timing base for duty computation.

Third Harmonic Generator

Injects a third‑harmonic component into the three input modulators.
Increases DC‑bus utilization and reduces modulation peaks while preserving the fundamental.

TriGen (Triangular Generator)

Generates a symmetric triangular carrier waveform for PWM.
Characterized by linear up/down ramps, suitable for natural sampling and symmetrical PWM.

InitFsw

Defines the number of ticks corresponding to half the switching period.
Sets the time base for all tick‑based PWM computations and carrier generators.

Dead Time Generator

Introduces a programmable dead time on the modulating signals (gate delays).
Prevents shoot‑through by enforcing non‑overlap between complementary high/low device commands.